A GOA (Gate Driver on Array) driving circuit is formed by integrating a gate driving circuit of a TFT LCD on a glass substrate so that scanning driving of a liquid crystal display panel can be formed. Compared with a traditional driving technology utilizing a COF, according to a GOA driving technology, a manufacturing cost can be substantially saved, and a Bonging procedure of the COF at the Gate side can be saved, which is beneficial to productivity improvement thereof.
FIG. 1 schematically shows a structure of one stage of driving modules of the GOA driving circuit in the prior art, and each stage of GOA driving modules is used for driving a row of pixel units. As shown in FIG. 1, the GOA driving module comprises a pull-up control unit 110, mainly used for pre-charging on Q(N), a pull-up unit 120, mainly used for pulling up an electric potential of G(N) and outputting a line scanning signal, a pull-down unit 130, mainly used for pulling down an electric potential of Q(N) and G(N) to Vss, and a pull-down maintaining unit 140, mainly used for controlling the electric potential of the Q(N) and the G(N) to be unchanged at Vss. Multiple stages of GOA driving modules are cascaded to form the GOA driving circuit, and two adjacent stages of GOA driving modules are driven by clock signals which have a same frequency and an opposite phase.
FIG. 2 is a time sequence diagram of the GOA driving circuit during operation in the prior art. As shown in FIG. 2, CK/XCK is a clock triggering signal, Vss is a direct current source, G(N) is a row scanning output signal, and Q(N) is a pre-charge point electric potential signal. In the GOA circuit, the existence of various parasitic capacitance results in different degrees of periodic fluctuation of signals in the circuit. The function of the pull-down maintaining unit is to reduce signal abnormity caused by a capacitance coupling effect through the voltage stabilization effect of the direct current source.
It is an urgent problem to be solved in the GOA driving circuit design to enable the voltages of key circuit nodes in the GOA driving circuit to be free from influence and be reliably maintained at a design value point. The present disclosure provides a solution for the problem.